Freescale Semiconductor MC68HC08KH12 Uživatelský manuál Strana 242
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Advance Information MC68HC(7)08KH12 — Rev. 1.1
242 Freescale Semiconductor
16.3 Features
Features of the break module include the following:
• Accessible I/O Registers during the Break Interrupt
• CPU-Generated Break Interrupts
• Software-Generated Break Interrupts
• COP Disabling during Break Interrupts
16.4 Functional Description
When the internal address bus matches the value written in the break
address registers, the break module issues a breakpoint signal (BKPT)
to the SIM. The SIM then causes the CPU to load the instruction register
with a software interrupt instruction (SWI) after completion of the current
CPU instruction. The program counter vectors to $FFFC and $FFFD
($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
• A CPU-generated address (the address in the program counter)
matches the contents of the break address registers.
• Software writes a logic one to the BRKA bit in the break status and
control register.
When a CPU generated address matches the contents of the break
address registers, the break interrupt begins after the CPU completes its
current instruction. A return from interrupt instruction (RTI) in the break
routine ends the break interrupt and returns the MCU to normal
operation. Figure 16-1 shows the structure of the break module.
- MC68HC08KH12 1
- Data Sheet 1
- List of Sections 3
- 4 Freescale Semiconductor 4
- Table of Contents 5
- Section 10. Monitor ROM (MON) 10
- Section 12. I/O Ports 11
- 16 Freescale Semiconductor 16
- List of Figures 17
- List of Tables 21
- 1.1 Contents 23
- 1.2 Introduction 24
- 1.3 Features 24
- 1.4 MCU Block Diagram 26
- Figure 1-1. MCU Block Diagram 27
- 68HC(7)08KH12 28
- Section 2. Memory Map 33
- 34 Freescale Semiconductor 34
- Figure 2-1. Memory Map 34
- 2.3 I/O Section 35
- 36 Freescale Semiconductor 36
- 38 Freescale Semiconductor 38
- 40 Freescale Semiconductor 40
- 42 Freescale Semiconductor 42
- 2.4 Monitor ROM 43
- 44 Freescale Semiconductor 44
- 3.1 Contents 45
- 3.2 Introduction 45
- 3.3 Functional Description 45
- 4.1 Contents 47
- 4.2 Introduction 47
- 4.3 Functional Description 47
- 48 Freescale Semiconductor 48
- 5.1 Contents 49
- 5.2 Introduction 49
- 5.3 Functional Description 49
- 6.1 Contents 51
- 6.2 Introduction 51
- 6.3 Features 52
- 6.4 CPU Registers 52
- V11HINZC 57
- 60 Freescale Semiconductor 60
- 7.1 Contents 61
- 7.2 Introduction 62
- Figure 7-1. SIM Block Diagram 63
- 64 Freescale Semiconductor 64
- POR 4163 (4096 + 64 + 3) 67
- All others 67 (64 + 3) 67
- 7.5 SIM Counter 71
- 7.6 Exception Control 72
- . Interrupt Entry 74
- (2) 0= highest priority 77
- 7.7 Low-Power Modes 79
- 7.8 SIM Registers 83
- 8.1 Contents 87
- 8.2 Introduction 88
- 8.3 Features 89
- 8.4 Functional Description 89
- 90 Freescale Semiconductor 90
- Figure 8-1. CGM Block Diagram 90
- 8.5 I/O Signals 98
- 8.6 CGM Registers 100
- — Rev. 1.1 102
- Freescale Semiconductor 103
- 8.7 Interrupts 107
- 8.8 Special Modes 107
- 9.1 Contents 113
- 9.2 Features 114
- 9.3 Overview 115
- 118 Freescale Semiconductor 118
- 136 Freescale Semiconductor 136
- 10.1 Contents 149
- 10.2 Introduction 149
- 10.3 Features 150
- 10.4 Functional Description 150
- 156 Freescale Semiconductor 156
- 158 Freescale Semiconductor 158
- 160 Freescale Semiconductor 160
- 11.1 Contents 161
- 11.2 Introduction 162
- 11.3 Features 162
- 11.4 Functional Description 163
- 164 Freescale Semiconductor 164
- 11.5 Interrupts 171
- 11.6 Wait Mode 171
- 11.8 I/O Signals 172
- 11.9 I/O Registers 173
- 182 Freescale Semiconductor 182
- Section 12. I/O Ports 183
- 12.2 Introduction 184
- 12.3 Port A 186
- 12.4 Port B 188
- 12.5 Port C 190
- 12.6 Port D 192
- 12.7 Port E 195
- 1. X = don’t care 198
- 2. Hi-Z = high impedance 198
- 200 Freescale Semiconductor 200
- 12.8 Port F 202
- 12.9 Port Options 204
- 206 Freescale Semiconductor 206
- 13.1 Contents 207
- 13.2 Introduction 207
- 13.3 Functional Description 208
- 13.4 I/O Signals 209
- 13.6 Interrupts 211
- 13.7 Monitor Mode 211
- 13.8 Low-Power Modes 212
- 14.1 Contents 213
- 14.2 Introduction 213
- 14.3 Features 213
- 14.4 Functional Description 214
- INTERNAL 215
- 15.1 Contents 219
- 15.2 Introduction 220
- 15.3 Features 220
- 222 Freescale Semiconductor 222
- 228 Freescale Semiconductor 228
- 234 Freescale Semiconductor 234
- 15.7 Wait Mode 239
- 15.8 Stop Mode 239
- 16.1 Contents 241
- 16.2 Introduction 241
- 16.3 Features 242
- 16.4 Functional Description 242
- 16.5 Break Module Registers 244
- 16.6 Low-Power Modes 246
- 17.1 Contents 247
- 17.2 Introduction 247
- 1. Voltages referenced to V 248
- 17.5 Thermal Characteristics 249
- 250 Freescale Semiconductor 250
- 17.7 Control Timing 251
- 252 Freescale Semiconductor 252
- 254 Freescale Semiconductor 254
- 17.13 USB Signaling Levels 256
- 258 Freescale Semiconductor 258
- 18.1 Contents 259
- 18.2 Introduction 259
- 260 Freescale Semiconductor 260
- How to Reach Us: 262
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